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| author | Richard Qin <richard.qin.x@gmail.com> | 2026-11-07 04:31:31 +0800 |
|---|---|---|
| committer | Richard Qin <richard.qin.x@gmail.com> | 2026-11-07 04:31:31 +0800 |
| commit | a7d5b2468553c6d3570ca2aa45c27cb93e26cb88 (patch) | |
| tree | 7031b1fac52e4f858c4e92041485135242768f7b /rv64cpu/scripts/gen_hex.sh | |
| parent | 4ca723bc9dc1b9db1bd03e3b3db0c58079c3f3c4 (diff) | |
| parent | 3b0b67af63af86c5ec9b2a63defa06b70923b2e3 (diff) | |
| download | rcc-project-a7d5b2468553c6d3570ca2aa45c27cb93e26cb88.tar.gz rcc-project-a7d5b2468553c6d3570ca2aa45c27cb93e26cb88.tar.xz | |
Merge remote-tracking branch 'rv64cpu-import/master'
Diffstat (limited to 'rv64cpu/scripts/gen_hex.sh')
| -rwxr-xr-x | rv64cpu/scripts/gen_hex.sh | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/rv64cpu/scripts/gen_hex.sh b/rv64cpu/scripts/gen_hex.sh new file mode 100755 index 0000000..8ba4c94 --- /dev/null +++ b/rv64cpu/scripts/gen_hex.sh @@ -0,0 +1,25 @@ +#!/usr/bin/env bash +# ─── gen_hex.sh ────────────────────────────────────────────────────────────────── +# Convert an ELF file to Verilog hex format for $readmemh +# +# Usage: ./scripts/gen_hex.sh <input.elf> [output.hex] +# ───────────────────────────────────────────────────────────────────────────────── +set -euo pipefail + +CROSS_PREFIX="${CROSS_PREFIX:-riscv64-unknown-elf-}" + +if [ $# -lt 1 ]; then + echo "Usage: $0 <input.elf> [output.hex]" + exit 1 +fi + +INPUT="$1" +OUTPUT="${2:-${INPUT%.elf}.hex}" + +${CROSS_PREFIX}objcopy -O verilog "$INPUT" "$OUTPUT" +echo "[gen_hex] $INPUT → $OUTPUT" + +# Also generate .bin and disassembly for inspection +${CROSS_PREFIX}objcopy -O binary "$INPUT" "${INPUT%.elf}.bin" +${CROSS_PREFIX}objdump -d -M no-aliases "$INPUT" > "${INPUT%.elf}.dump" +echo "[gen_hex] Also generated .bin and .dump" |
