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authorRichard Qin <richard.qin.x@gmail.com>2026-03-17 02:39:24 +0800
committerRichard Qin <richard.qin.x@gmail.com>2026-03-17 02:39:24 +0800
commitcd638dacbe7d0f890206209317cc119246cf700b (patch)
tree8e16bd601d0ae163b795cb58a4b1c1b7b063c268 /rv64cpu/tb/CMakeLists.txt
parentbb51da5bb8b5c8621661695bdf3c7bca42f2f49d (diff)
downloadrcc-project-cd638dacbe7d0f890206209317cc119246cf700b.tar.gz
rcc-project-cd638dacbe7d0f890206209317cc119246cf700b.tar.xz
Execute Stage unit and tests
Diffstat (limited to 'rv64cpu/tb/CMakeLists.txt')
-rw-r--r--rv64cpu/tb/CMakeLists.txt11
1 files changed, 11 insertions, 0 deletions
diff --git a/rv64cpu/tb/CMakeLists.txt b/rv64cpu/tb/CMakeLists.txt
index e0a3238..cd419f9 100644
--- a/rv64cpu/tb/CMakeLists.txt
+++ b/rv64cpu/tb/CMakeLists.txt
@@ -103,6 +103,17 @@ add_verilator_target(
INCLUDE_DIRS ${RTL_COMMON_INCLUDES}
TB_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/unit/tb_id_ex_reg.cc
)
+
+add_verilator_target(
+ NAME tb_ex_stage
+ TOP_MODULE ex_stage
+ SOURCES ${RTL_CORE_DIR}/include/rv64_pkg.sv
+ ${RTL_CORE_DIR}/alu.sv
+ ${RTL_CORE_DIR}/branch_unit.sv
+ ${RTL_CORE_DIR}/ex_stage.sv
+ INCLUDE_DIRS ${RTL_COMMON_INCLUDES}
+ TB_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/unit/tb_ex_stage.cc
+)
#
# add_verilator_target(
# NAME tb_csr