rcc-project - An optimizing compiler for C.

	Commit message (Collapse)	Author	Age	Files	Lines
*	[CodeGen] Implement reaching-def analysis printing	Richard-Qin-X	2026-08-26	1	-0/+26
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*	[RISCV] Implement make-compressible pass	Richard-Qin-X	2026-08-25	1	-0/+6
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*	[CodeGen] Implement RISC-V machine outlining	Richard-Qin-X	2026-08-25	1	-0/+20
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*	[CodeGen] Generate RISC-V macro fusion rules	Richard-Qin-X	2026-08-22	1	-1/+1
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*	[RISCV][GlobalISel] Select and expand global addresses	Richard-Qin-X	2026-08-19	1	-0/+5
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*	[IR] Split LL parsing, assembly writing, and data layout	Richard-Qin-X	2026-08-13	1	-52/+0
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*	[Support] Split APInt and APFloat ownership	Richard-Qin-X	2026-08-13	1	-0/+1
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*	[CodeGen] Align MIR parser and printer ownership	Richard-Qin-X	2026-08-13	5	-490/+0
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*	[MIR] Remove alternate layout and float APIs	Richard-Qin-X	2026-08-12	3	-4/+0
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*	[MIR] Accept fixed-baseline LLVM syntax	Richard-Qin-X	2026-08-11	3	-0/+19
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*	[CodeGen] Complete register allocation infrastructure	Richard-Qin-X	2026-08-09	1	-3/+3
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*	[MIR] Complete document parsing and printing	Richard-Qin-X	2026-08-07	5	-3/+260
\| \| \| \|	Implement the single LLVM-compatible MIR document path with structured\nembedded-IR references, YAML mappings, constants, and deterministic printing.\n\nKeep pointer LLT widths DataLayout-derived, reject layout-dependent output\nwhen embedded IR is omitted, and record the fixed-baseline compatibility\ncontract and regression coverage.
*	[MIR] Add machine instruction parser and printer	Richard-Qin-X	2026-08-04	2	-0/+130
\| \| \| \|	Parse MachineFunction bodies in two passes and serialize the same MachineIR model in complete or readable form. Extend instruction attachments and memory operands required by the fixed LLVM MIR grammar, and cover deterministic parse-print round trips.
*	[MIR] Add machine instruction lexer	Richard-Qin-X	2026-08-03	1	-0/+181
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*	[MIR] Add compilation unit reference context	Richard-Qin-X	2026-08-01	1	-0/+175