| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [RISCV] Split the GlobalISel target components | Richard-Qin-X | 2026-08-12 | 1 | -1/+6 |
| * | [Testing] Add the LLVM MIR RUN executor | Richard-Qin-X | 2026-08-12 | 1 | -0/+682 |
| * | [Tooling] Complete the LLVM MIR command-line contract | Richard-Qin-X | 2026-08-12 | 5 | -155/+176 |
| * | [Tooling] Adopt LLVM MIR command-line spellings | Richard-Qin-X | 2026-08-12 | 4 | -70/+142 |
| * | [RISCV] Legalize fixed-baseline RV64 MachineIR | Richard-Qin-X | 2026-08-11 | 1 | -0/+19 |
| * | [MIR] Accept fixed-baseline LLVM syntax | Richard-Qin-X | 2026-08-11 | 2 | -3/+23 |
| * | [Tooling] Complete backend tooling and validation | Richard-Qin-X | 2026-08-10 | 5 | -0/+1614 |
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