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Commit message (Collapse)AuthorAgeFilesLines
* [RISCV] Implement Zcmp move mergingRichard-Qin-X2026-08-259-0/+392
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* [CodeGen] Implement CFI instruction insertionRichard-Qin-X2026-08-246-1/+478
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* [RISCV] Implement save and restore libcallsRichard-Qin-X2026-08-243-75/+347
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* [CodeGen] Match LLVM callee-save live-insRichard-Qin-X2026-08-241-1/+1
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* [RISCV] Match LLVM compressed stack frame loweringRichard-Qin-X2026-08-247-104/+102
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* [RISCV] Match LLVM large call frame loweringRichard-Qin-X2026-08-243-209/+290
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* [RISCV] Match LLVM emergency spill layoutRichard-Qin-X2026-08-2415-230/+393
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* [CodeGen] Match LLVM machine combiner semanticsRichard-Qin-X2026-08-246-343/+179
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* [RISCV] Match LLVM frame lowering semanticsRichard-Qin-X2026-08-2413-155/+164
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* [CodeGen] Implement RISC-V peephole branch optimizationRichard-Qin-X2026-08-246-1/+359
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* [RISCV] Generate MC pseudo loweringRichard-Qin-X2026-08-2215-207/+392
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* [CodeGen] Match LLVM machine debug strippingRichard-Qin-X2026-08-229-2/+85
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* [CodeGen] Generate RISC-V macro fusion rulesRichard-Qin-X2026-08-2237-91/+1323
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* [CodeGen] Match LLVM final verifier contractRichard-Qin-X2026-08-191-2/+2
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* [CodeGen] Match LLVM finalization contractRichard-Qin-X2026-08-191-2/+2
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* [CodeGen] Match LLVM late pseudo contractRichard-Qin-X2026-08-191-2/+2
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* [CodeGen] Remove RCC fallthrough normalizationRichard-Qin-X2026-08-195-270/+0
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* [CodeGen] Match LLVM block placement contractRichard-Qin-X2026-08-191-6/+2
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* [CodeGen] Unify LLVM branch folding pipelineRichard-Qin-X2026-08-197-469/+310
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* [CodeGen] Match LLVM tail duplication contractRichard-Qin-X2026-08-191-9/+1
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* [CodeGen] Match LLVM post-machine scheduler contractRichard-Qin-X2026-08-191-7/+1
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* [CodeGen] Match LLVM post-RA pseudo expansion contractRichard-Qin-X2026-08-191-7/+1
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* [CodeGen] Remove non-LLVM machine DCE placementsRichard-Qin-X2026-08-192-8/+2
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* [CodeGen] Remove unsupported post-frame combinerRichard-Qin-X2026-08-194-25/+1
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* [CodeGen] Remove unsupported pre-PEI pseudo expansionRichard-Qin-X2026-08-196-57/+3
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* [CodeGen] Match LLVM shrink wrapping contractRichard-Qin-X2026-08-191-7/+1
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* [CodeGen] Match LLVM post-RA sink contractRichard-Qin-X2026-08-191-3/+1
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* [CodeGen] Match LLVM post-RA LICM contractRichard-Qin-X2026-08-191-3/+1
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* [CodeGen] Match LLVM post-RA combiner contractRichard-Qin-X2026-08-191-1/+1
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* [CodeGen] Match LLVM stack slot coloring contractRichard-Qin-X2026-08-191-6/+1
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* [CodeGen] Match LLVM PBQP allocator input contractRichard-Qin-X2026-08-191-4/+2
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* [CodeGen] Match LLVM machine scheduler contractRichard-Qin-X2026-08-191-6/+1
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* [CodeGen] Match LLVM machine sink input contractRichard-Qin-X2026-08-191-2/+2
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* [CodeGen] Match LLVM prologepilog input contractRichard-Qin-X2026-08-191-2/+1
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* [GlobalISel] Generate prelegalizer combiner rulesRichard-Qin-X2026-08-1919-16/+1381
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* [RISCV][GlobalISel] Select and expand global addressesRichard-Qin-X2026-08-1931-19/+495
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* [RISCV][GlobalISel] Generate integer store selectionRichard-Qin-X2026-08-192-80/+76
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* [RISCV][GlobalISel] Generate integer load selectionRichard-Qin-X2026-08-199-80/+346
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* [RISCV][GlobalISel] Generate frame index selectionRichard-Qin-X2026-08-192-0/+17
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* [RISCV][GlobalISel] Correct floating constant materializationRichard-Qin-X2026-08-191-3/+16
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* [RISCV][GlobalISel] Match floating comparisonsRichard-Qin-X2026-08-1910-159/+471
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* [RISCV][GlobalISel] Generate trap selectionRichard-Qin-X2026-08-193-16/+28
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* [RISCV][GlobalISel] Generate select instruction matchingRichard-Qin-X2026-08-195-161/+229
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* [RISCV][GlobalISel] Generate indirect branch selectionRichard-Qin-X2026-08-1913-22/+143
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* [RISCV][GlobalISel] Generate conditional branch selectionRichard-Qin-X2026-08-1711-37/+322
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* [RISCV][GlobalISel] Generate direct branch selectionRichard-Qin-X2026-08-172-13/+10
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* [CMake] Accept empty clang-tidy diffsRichard-Qin-X2026-08-171-0/+3
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* [RISCV][GlobalISel] Generate implicit-def selectionRichard-Qin-X2026-08-173-8/+20
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* [RISCV][GlobalISel] Constrain core copies during selectionRichard-Qin-X2026-08-172-10/+29
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* [GlobalISel] Remove redundant virtual copies after selectionRichard-Qin-X2026-08-171-2/+42
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generated by cgit v1.2.3 (git 2.46.0) at 2026-10-29 07:14:55 +0000