| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | feat: implement hardware random number generation and early PRNG initialization | Richard Qin | 2026-05-02 | 1 | -0/+27 |
| * | feat: add RISC-V configuration and memory management enhancements | Richard Qin | 2026-05-02 | 2 | -4/+9 |
| * | feat: update UART handling and memory management parameters for improved func... | Richard Qin | 2026-05-02 | 1 | -4/+0 |
| * | feat: add SBI interface with ecall and timer functions for RISC-V architecture | Richard Qin | 2026-05-02 | 1 | -0/+39 |
| * | feat: add timer interrupt enable/disable functions for RISC-V architecture | Richard Qin | 2026-05-02 | 1 | -0/+15 |
| * | feat: implement SV39 page table interface and operations for RISC-V architecture | Richard Qin | 2026-04-21 | 1 | -0/+42 |
| * | feat: add RISC-V architecture configuration header with memory layout constants | Richard Qin | 2026-04-21 | 1 | -0/+28 |
| * | feat: add initial RISC-V architecture support and core kernel functionality | Richard Qin | 2026-04-17 | 5 | -0/+334 |
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| A general-purpose operating system with Linux ABI compatibility |
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