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authorRichard-Qin-X <richard.qin.001@gmail.com>2026-08-11 17:37:42 +0800
committerRichard-Qin-X <richard.qin.001@gmail.com>2026-08-11 17:37:42 +0800
commit6a7b083f322f4ac47e58cbf9d4d5fd4d1f6fecd0 (patch)
treef363c502f0e2b9cda2f12928049275a433db6ad4 /backend/include/rcc/CodeGen/TargetCodeGen.h
parentadcf8c9b1bd1b47e00bf859693112cea1f7e8c9f (diff)
downloadrcc-project-6a7b083f322f4ac47e58cbf9d4d5fd4d1f6fecd0.tar.gz
rcc-project-6a7b083f322f4ac47e58cbf9d4d5fd4d1f6fecd0.tar.xz
[MIR] Accept fixed-baseline LLVM syntax
Diffstat (limited to 'backend/include/rcc/CodeGen/TargetCodeGen.h')
-rw-r--r--backend/include/rcc/CodeGen/TargetCodeGen.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/backend/include/rcc/CodeGen/TargetCodeGen.h b/backend/include/rcc/CodeGen/TargetCodeGen.h
index f2aac5d..34a6de4 100644
--- a/backend/include/rcc/CodeGen/TargetCodeGen.h
+++ b/backend/include/rcc/CodeGen/TargetCodeGen.h
@@ -89,6 +89,11 @@ public:
const TargetDescription &) const {
return {};
}
+
+ [[nodiscard]] virtual Expected<void>
+ constrainSelectedInstruction(MachineInstr &, MachineFunction &, const TargetDescription &) const {
+ return {};
+ }
};
class TargetSSAInfo {