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path: root/backend/include/rcc/CodeGen/TargetCodeGen.h
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* [GlobalISel] Split the generic pipeline componentsRichard-Qin-X2026-08-121-95/+0
* [RISCV] Consolidate instruction behavior in RISCVInstrInfoRichard-Qin-X2026-08-121-38/+0
* [MIR] Accept fixed-baseline LLVM syntaxRichard-Qin-X2026-08-111-0/+5
* [CodeGen] Implement machine SSA exitRichard-Qin-X2026-08-081-0/+34
* [CodeGen] Implement RV64GC legalization and instruction selectionRichard-Qin-X2026-08-081-0/+94