| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [CodeGen] Centralize machine instruction erasure | Richard-Qin-X | 2026-08-28 | 1 | -0/+2 |
| * | [CodeGen] Match LLVM machine debug stripping | Richard-Qin-X | 2026-08-22 | 1 | -0/+2 |
| * | [CodeGen] Match LLVM Legalizer ownership | Richard-Qin-X | 2026-08-14 | 1 | -1/+1 |
| * | [CodeGen] Implement RV64GC frame lowering | Richard-Qin-X | 2026-08-09 | 1 | -0/+2 |
| * | [MIR] Add machine instruction parser and printer | Richard-Qin-X | 2026-08-04 | 1 | -0/+59 |
| * | [CodeGen] Model machine debug metadata | Richard-Qin-X | 2026-08-02 | 1 | -0/+11 |
| * | [CodeGen] Track debug instruction identities | Richard-Qin-X | 2026-08-01 | 1 | -0/+13 |
| * | [CodeGen] Add transactional MachineIR builder | Richard-Qin-X | 2026-08-01 | 1 | -2/+2 |
| * | [CodeGen] Build the core MachineIR object model | Richard-Qin-X | 2026-08-01 | 1 | -0/+164 |
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