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path: root/backend/lib/Target/RISCV/GISel
Commit message (Expand)AuthorAgeFilesLines
* [CodeGen] Centralize machine instruction erasureRichard-Qin-X2026-08-282-45/+9
* [GlobalISel] Generate floating memory selectionRichard-Qin-X2026-08-271-95/+0
* [RISCV] Generate atomic RMW selectionRichard-Qin-X2026-08-271-95/+2
* [RISCV] Remove unused selector helpersRichard-Qin-X2026-08-271-80/+0
* [GlobalISel] Select each instruction onceRichard-Qin-X2026-08-271-84/+0
* [CodeGen] Generate RISC-V macro fusion rulesRichard-Qin-X2026-08-221-8/+8
* [GlobalISel] Generate prelegalizer combiner rulesRichard-Qin-X2026-08-191-0/+56
* [RISCV][GlobalISel] Select and expand global addressesRichard-Qin-X2026-08-191-0/+178
* [RISCV][GlobalISel] Generate integer store selectionRichard-Qin-X2026-08-191-80/+0
* [RISCV][GlobalISel] Generate integer load selectionRichard-Qin-X2026-08-191-74/+64
* [RISCV][GlobalISel] Correct floating constant materializationRichard-Qin-X2026-08-191-3/+16
* [RISCV][GlobalISel] Match floating comparisonsRichard-Qin-X2026-08-191-142/+202
* [RISCV][GlobalISel] Generate trap selectionRichard-Qin-X2026-08-191-16/+0
* [RISCV][GlobalISel] Generate select instruction matchingRichard-Qin-X2026-08-191-161/+123
* [RISCV][GlobalISel] Generate indirect branch selectionRichard-Qin-X2026-08-191-15/+0
* [RISCV][GlobalISel] Generate conditional branch selectionRichard-Qin-X2026-08-171-13/+0
* [RISCV][GlobalISel] Generate direct branch selectionRichard-Qin-X2026-08-171-13/+0
* [RISCV][GlobalISel] Generate implicit-def selectionRichard-Qin-X2026-08-171-3/+0
* [RISCV][GlobalISel] Constrain core copies during selectionRichard-Qin-X2026-08-171-0/+15
* [RISCV][GlobalISel] Generate integer extension selectionsRichard-Qin-X2026-08-171-126/+11
* [RISCV][GlobalISel] Remove lowered overflow selectionsRichard-Qin-X2026-08-161-367/+0
* [RISCV][GlobalISel] Remove lowered minmax selectionsRichard-Qin-X2026-08-161-117/+0
* [RISCV][GlobalISel] Generate copy sign selectionsRichard-Qin-X2026-08-161-48/+28
* [RISCV][GlobalISel] Generate high multiply selectionsRichard-Qin-X2026-08-161-101/+0
* [RISCV][GlobalISel] Remove obsolete binary selectorRichard-Qin-X2026-08-161-90/+0
* [RISCV][GlobalISel] Generate shift selectionsRichard-Qin-X2026-08-161-107/+135
* [RISCV][GlobalISel] Generate integer arithmetic selectionsRichard-Qin-X2026-08-161-111/+4
* [RISCV][GlobalISel] Generate pointer arithmetic selectionsRichard-Qin-X2026-08-161-9/+0
* [RISCV][GlobalISel] Generate floating-point selectionsRichard-Qin-X2026-08-161-182/+3
* [RISCV][GlobalISel] Generate integer comparisonsRichard-Qin-X2026-08-161-174/+2
* tablegen: Generate GlobalISel match tablesRichard-Qin-X2026-08-161-47/+22
* [GlobalISel] Propagate no-fp-except flagsRichard-Qin-X2026-08-161-0/+15
* [RISCV][GlobalISel] Select mixed-width copy-signRichard-Qin-X2026-08-162-4/+44
* [RISCV][GlobalISel] Select word division pseudosRichard-Qin-X2026-08-161-1/+10
* [RISCV][GlobalISel] Select RV64 word shiftsRichard-Qin-X2026-08-161-0/+69
* [RISCV][GlobalISel] Select constant operands as immediatesRichard-Qin-X2026-08-161-23/+114
* [RISCV][GlobalISel] Select word shift pseudosRichard-Qin-X2026-08-151-2/+8
* [RISCV][GlobalISel] Match LLVM constant materializationRichard-Qin-X2026-08-152-128/+89
* [RISCV][GlobalISel] Constrain selected builder operandsRichard-Qin-X2026-08-151-1/+73
* [GlobalISel] Legalize RISC-V va_startRichard-Qin-X2026-08-152-0/+87
* [GlobalISel] Legalize RISC-V jump tablesRichard-Qin-X2026-08-152-0/+206
* [GlobalISel] Legalize multiply with overflowRichard-Qin-X2026-08-151-0/+7
* [RISCV][GlobalISel] Legalize floating-point classesRichard-Qin-X2026-08-151-1/+67
* [RISCV][GlobalISel] Legalize floating-point remainderRichard-Qin-X2026-08-152-15/+44
* [RISCV][GlobalISel] Widen integer-to-floating conversions to XLENRichard-Qin-X2026-08-151-0/+11
* [RISCV][GlobalISel] Legalize floating-point to integer conversionsRichard-Qin-X2026-08-151-0/+19
* [GlobalISel] Lower floating-point conversion libcallsRichard-Qin-X2026-08-151-42/+91
* [RISCV][GlobalISel] Preserve Zbb sign extensionsRichard-Qin-X2026-08-152-1/+6
* [RISCV][GlobalISel] Legalize scalar bit count operationsRichard-Qin-X2026-08-151-12/+49
* [GlobalISel] Lower byte-swap operationsRichard-Qin-X2026-08-151-1/+5
generated by cgit v1.2.3 (git 2.46.0) at 2026-10-29 23:08:49 +0000