| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [RISCV] Implement push-pop optimization | Richard-Qin-X | 2026-08-26 | 1 | -0/+2 |
| * | [CodeGen] Implement RISC-V finalize-isel | Richard-Qin-X | 2026-08-26 | 1 | -0/+2 |
| * | [RISCV] Optimize W instructions | Richard-Qin-X | 2026-08-26 | 1 | -0/+2 |
| * | [RISCV] Implement make-compressible pass | Richard-Qin-X | 2026-08-25 | 1 | -0/+2 |
| * | [RISCV] Implement base offset merging | Richard-Qin-X | 2026-08-25 | 1 | -0/+1 |
| * | [RISCV] Implement Zcmp move merging | Richard-Qin-X | 2026-08-25 | 1 | -0/+3 |
| * | [RISCV] Match LLVM compressed stack frame lowering | Richard-Qin-X | 2026-08-24 | 1 | -1/+2 |
| * | [RISCV] Match LLVM emergency spill layout | Richard-Qin-X | 2026-08-24 | 1 | -2/+2 |
| * | [RISCV] Match LLVM frame lowering semantics | Richard-Qin-X | 2026-08-24 | 1 | -1/+1 |
| * | [CodeGen] Generate RISC-V macro fusion rules | Richard-Qin-X | 2026-08-22 | 1 | -2/+7 |
| * | [GlobalISel] Generate prelegalizer combiner rules | Richard-Qin-X | 2026-08-19 | 1 | -0/+3 |
| * | [RISCV] Split the GlobalISel target components | Richard-Qin-X | 2026-08-12 | 1 | -0/+38 |
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