lume - A general-purpose operating system with Linux ABI compatibility

	Commit message (Collapse)	Author	Age	Files	Lines
*	refactor: promote new architecture to repository root	Richard Qin	2026-07-10	16	-1105/+0
\| \| \| \|	Archive the deprecated implementation under lume-legacy, make the new kernel the default root-level build, and update repository entry points without changing kernel behavior.
*	feat: establish bootable new architecture checkpoint	Richard Qin	2026-07-10	13	-4/+490
\| \| \| \|	Replace the compressed boot path with a relocatable higher-half RISC-V entry, expand memory and SMP support, and add the driver, TTY, VFS, exec, signal, syscall, initramfs, and self-test infrastructure needed for a bootable kernel checkpoint.
*	feat: add exception table implementation with binary search and initialization	Richard Qin	2026-05-13	1	-0/+55
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*	feat: add support for Copy-On-Write in SV39 page table management	Richard Qin	2026-05-13	1	-0/+5
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*	feat: add relocation header and implementation for RISC-V architecture	Richard Qin	2026-05-13	1	-1/+46
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*	feat: implement KASLR support and runtime address mapping for RISC-V ↵	Richard Qin	2026-05-03	1	-6/+34
\| \| \| \| \| \|	architecture Co-authored-by: Copilot <copilot@github.com>
*	feat: implement hardware random number generation and early PRNG initialization	Richard Qin	2026-05-02	1	-0/+27
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*	feat: add RISC-V configuration and memory management enhancements	Richard Qin	2026-05-02	2	-4/+9
\| \| \| \|	Co-authored-by: Copilot <copilot@github.com>
*	feat: update UART handling and memory management parameters for improved ↵	Richard Qin	2026-05-02	1	-4/+0
\| \| \| \|	functionality
*	feat: add SBI interface with ecall and timer functions for RISC-V architecture	Richard Qin	2026-05-02	1	-0/+39
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*	feat: add timer interrupt enable/disable functions for RISC-V architecture	Richard Qin	2026-05-02	1	-0/+15
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*	feat: implement SV39 page table interface and operations for RISC-V architecture	Richard Qin	2026-04-21	1	-0/+42
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*	feat: add RISC-V architecture configuration header with memory layout constants	Richard Qin	2026-04-21	1	-0/+28
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*	feat: add initial RISC-V architecture support and core kernel functionality	Richard Qin	2026-04-17	5	-0/+334
	- Implement MMU hardware primitives for RISC-V SV39 in mmu.h - Create trap vector control primitives in trap.h - Define trap frame structure for RISC-V in trapframe.h - Add assembly routines for context switching in swtch.S - Implement trap vector entry/exit in trap_vector.S - Introduce basic error number definitions in errno.h - Provide placement new/delete operators in new.h - Define kernel panic handler in panic.h and implement in panic.cc - Establish basic type definitions in types.h - Create the kernel main entry point in main.cc with global initialization - Add synchronization primitives using spinlocks in spinlock.h and spinlock.cc - Define per-CPU state tracking for interrupts in cpu_state.h - Create a linker script for the kernel in linker.ld - Update module makefiles for kernel and library components